The present invention relates to waveform acquisition by electron-beam probe systems.
Conventional electron-beam probe systems implement a closed-loop scheme for acquiring waveforms. An example is the IDS 10000™ available from Schlumberger Technologies, Inc. of San Jose, Calif. A closed-loop acquisition scheme will be referred to as a closed-loop scheme.
There are several reasons for using closed-loop schemes. A feedback loop in a closed-loop scheme allows an acquisition loop output to linearly track voltage changes on a probe point. A probe point is the location where the electron-beam pulses are directed. Therefore, close-loop schemes generally allow a probe system to reliably measure voltages of a probe point on a device under test (“DUT”).
FIG. 1 shows a conventional closed-loop electron-beam probe system 100. A tester 104 applies a pattern of test vectors to a DUT 102. At an appropriate point in time, the tester 104 triggers a timing controller 106. When triggered, the timing controller 106 supplies beam-pulse timing signals to an electron-optics device 108. In response to the beam-pulse timing signals, the electron-optics device 108 directs a primary electron-beam pulse 110 at a probe point of the DUT 102. The primary electron-beam pulse 110 is pulsed by a blanking circuit. The electrons from the primary electron-beam pulse 110 interacts with the probe point. This interaction generates low energy electrons, called secondary electrons, some of which have sufficient energy to overcome a potential barrier of a filter mesh 112 situated between the electron-optics device 108 and the DUT 102. That is, some of the secondary electrons have sufficient energy to escape the voltage difference between the probe point on the DUT 102 and the filter mesh 112. These secondary electrons form a secondary beam 114 that is detected by a detector 116, which produces a corresponding secondary-electron current, ISEC. The secondary-electron current, ISEC, varies non-linearly with changes in a surface potential, VDUT, at the probe point on the DUT 102.
A feedback loop 118 linearizes the relationship between ISEC and VDUT by causing the filter mesh voltage, VFILTER, to change proportionally with changes in VDUT. That is, the feedback loop causes VFILTER to track VDUT. The feedback loop includes a detector 116, subtractor 120, a gated integrator 122, a voltage offset 132, and the filter mesh 112. The subtractor receives as input a reference current, IREF, and the secondary-electron current, ISEC. The subtractor 120 generates an error signal, VERROR, whose amplitude is proportional to the difference between the secondary-electron current, ISEC, and the reference current, IREF. A device such as a constant current source generates the reference current, IREF. The error signal, VERROR, is passed to a gated integrator 122. The gated integrator 122 includes a controlled gate 124, a capacitor 126, an amplifier 128, and a switch 130. The error signal, VERROR, passes through the controlled gate 124 to the capacitor 126 and amplifier 128. As a result, the gated integrator supplies an output voltage, which is referred to as integrator voltage or VINT. The voltage at filter mesh 112, VFILTER, is the sum of VINT minus a voltage offset 132, VOFFSET, which suppresses the Type I Local Field Effect. The number of electrons with sufficient energy to overcome the potential barrier of filter mesh 112 is governed by the difference between VDUT and VFILTER. When VDUT changes, the feedback loop 118 acts to maintain constant the number of electrons that overcome the potential barrier. That is, the feedback loop tries to keep the secondary-electron current, ISEC, constant by varying VINT(=VFILTER+VOFFSET). This stable condition is achieved when the change in VFILTER equals the change in VDUT. That is, the filter voltage, VFILTER, tracks (with a fixed VOFFSET) variations in the surface potential VDUT of the probe point on the DUT 102. (The integrator voltage, VINT, also tracks variations in the surface potential VDUT of the probe point on the DUT.) The switch 130 is closed before the start of each acquisition point in time to reset the gated integrator 122. The controlled gate 124 is closed during each beam-pulse interval so that the gating period coincides with the arrival of electrons in secondary beam 114 at detector 116, thus avoiding overcharging the gated integrator with the reference current and white noise generated by random secondary-electron current.
To obtain a waveform, measurement of VDUT as described above is repeated at multiple and periodic points in time after the tester 104 sends a trigger signal. These points in time are designated as t1, t2, . . . , tm and represent time delays from the trigger time point. Measurements taken at multiple time points form a sweep. For many applications, 500 is a suitable number of time points. For each sweep, the points in time will be referred to by indices.
The measurements typically have undesirable white noise. The noise is usually random in nature and can be reduced by obtaining many sweeps and then averaging the sweeps. Usually, about sixteen to thirty-two sweeps are sufficient to reduce the white noise level.
The time needed to make an accurate measurement of the DUT voltage, i.e., the acquisition time, depends on the amount by which VFILTER has to change to settle the acquisition-loop. As VFILTER reaches the settled value, the difference between ISEC and IREF decreases. Consequently, the integrator charging slows down and, as a result, VINT settling slows down.
The acquisition time can be shortened somewhat while maintaining the advantages of stability and linearity of the closed-loop method. Factors that affect acquisition time include: the bandwidth of a secondary electron detector, the pulse width of the primary electron-beam, the degree that the primary electron-beam doses the DUT, the electron beam current, the capacitance of the integrator, the degree of photomultiplier (“PMT”) gain, the tester trigger frequency, the signal-to-noise ratio, and the linearity of the relationship between changes in VDUT and VFILTER.
The above factors can be optimized to reduce the acquisition time of a closed acquisition loop. However, even when the acquisition loop is optimized, the charging current still decreases as the acquisition-loop approaches settling conditions.